Science Publishing Group: Science Journal of Circuits, Systems and Signal Processing: Table of Contents
The aim of <i> Science Journal of Circuits, Systems and Signal Processing (CSSP) </i> is to help meet the needs of outlets for significant research papers and state-of-the-art review articles in the area. The scope of the journal is broad, ranging from mathematical foundations to practical engineering design. It encompasses, but is not limited to, such topics as linear and nonlinear networks, distributed circuits and systems, multi-dimensional signals and systems, analog filters and signal processing, digital filters and signal processing, statistical signal processing, multimedia, computer aided design, graph theory, neural systems, communication circuits and systems, and VLSI signal processing.
http://www.sciencepublishinggroup.com/j/cssp Science Publishing Group: Science Journal of Circuits, Systems and Signal Processing: Table of Contents
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Science Journal of Circuits, Systems and Signal Processing
Science Journal of Circuits, Systems and Signal Processing
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High linearity CMOS variable gain amplifier for UWB applications
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20120101.11
A large dynamic-range Programmable Variable Gain Amplifier (PVGA) suitable for Ultra Wide Band (UWB) applications is presented. The PVGA is composed of three programmable variable gain amplifier stages followed by an output buffer. Such wide bandwidth allows our proposed PVGA to be used in multi-standard protocols. Power reduction is developed for the variable gain amplifier stages. Thorough analyses of the mid-band gain and noise are presented; and design tradeoffs are carefully handled. The PVGA circuit is designed and simulated in 0.13 µm IBM-CMOS process; the overall PVGA with buffer consumes 25 mA from a 1.5 V supply. The PVGA achieves 54.5 dB dynamic-range (DR), 17.6 dBm IIP3, -42.31 dB THD at peak-to-peak differential output voltage of 1 V, and frequency 400 MHz Moreover; the pro-posed circuit reports a good noise performance; the average integrated noise is 121.6 nV/Hz at minimum gain of -0.5 dB.
A large dynamic-range Programmable Variable Gain Amplifier (PVGA) suitable for Ultra Wide Band (UWB) applications is presented. The PVGA is composed of three programmable variable gain amplifier stages followed by an output buffer. Such wide bandwidth allows our proposed PVGA to be used in multi-standard protocols. Power reduction is developed for the variable gain amplifier stages. Thorough analyses of the mid-band gain and noise are presented; and design tradeoffs are carefully handled. The PVGA circuit is designed and simulated in 0.13 µm IBM-CMOS process; the overall PVGA with buffer consumes 25 mA from a 1.5 V supply. The PVGA achieves 54.5 dB dynamic-range (DR), 17.6 dBm IIP3, -42.31 dB THD at peak-to-peak differential output voltage of 1 V, and frequency 400 MHz Moreover; the pro-posed circuit reports a good noise performance; the average integrated noise is 121.6 nV/Hz at minimum gain of -0.5 dB.
High linearity CMOS variable gain amplifier for UWB applications
doi:10.11648/j.cssp.20120101.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
I. L. Abdalla
Y. A. Khalaf
F. A. Farag
High linearity CMOS variable gain amplifier for UWB applications
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© Science Publishing Group
Design of Analog Field Programmable CMOS Current Conveyor
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20120101.12
The paper propose a modified high frequency current controlled current conveyor CMOS circuit CCCII where current gain, current controlling intrinsic impedance and circuit offsets are programmable independently to desired values within a specific field range after fabrication with the help of field programmable floating gate transistors FGMOS. The programmable charge at floating-gate of FGMOS using external voltages results in its threshold voltage variation, which in turn program the design (CCCII) specifications. The circuit occupies low power, about 1.509mW total power dissipation and shows higher temperature stability (0.0287uA/°C variation in output current with temperature change). With specific sizing and biasing condition, the current gain can be programmed from 0.2 to 2.1, intrinsic impedance from 15K to 51K, while offset current can be compensated, independently using each FGMOSFETs, respectively, with 13-bit precision. However the final programmable CCCII circuit with FGMOSFETs occupies 65µm × 54µm chip area. The circuit finds application in systems where field-programmability of the design using smaller sized hardware is required like universal filter, current control high frequency oscillator, etc as compared to the circuits using current control conveyor based FPAAs.
The paper propose a modified high frequency current controlled current conveyor CMOS circuit CCCII where current gain, current controlling intrinsic impedance and circuit offsets are programmable independently to desired values within a specific field range after fabrication with the help of field programmable floating gate transistors FGMOS. The programmable charge at floating-gate of FGMOS using external voltages results in its threshold voltage variation, which in turn program the design (CCCII) specifications. The circuit occupies low power, about 1.509mW total power dissipation and shows higher temperature stability (0.0287uA/°C variation in output current with temperature change). With specific sizing and biasing condition, the current gain can be programmed from 0.2 to 2.1, intrinsic impedance from 15K to 51K, while offset current can be compensated, independently using each FGMOSFETs, respectively, with 13-bit precision. However the final programmable CCCII circuit with FGMOSFETs occupies 65µm × 54µm chip area. The circuit finds application in systems where field-programmability of the design using smaller sized hardware is required like universal filter, current control high frequency oscillator, etc as compared to the circuits using current control conveyor based FPAAs.
Design of Analog Field Programmable CMOS Current Conveyor
doi:10.11648/j.cssp.20120101.12
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
G. Kapur
S. Mittal
C. M. Markan
V. P. Pyara
Design of Analog Field Programmable CMOS Current Conveyor
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© Science Publishing Group
A Novel Phonemes Classification Method Using Fuzzy Logic
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130201.11
In this study, we will interest in phonemes classification of Timit database using Fuzzy Logic. The fuzzy method consists in the extraction of a three fuzzy-reference vectors: maximal, mean and minimal. To classify a phoneme request, we calculate its degree of membership to all defined classes. The class of a phoneme request is, then, the one which maximizes one degree of membership calculated according to reference vectors. Different techniques of speech analysis are used for evaluation. Results show that fuzzy logic can provide a significant issue when mathematical rigor is not present as to the signal processing since the retained recognition rates was 90,85%, 22,96%, 98,57% and 91,73% for respectively MFCC, LPC, PLP and RASTA PLP.
In this study, we will interest in phonemes classification of Timit database using Fuzzy Logic. The fuzzy method consists in the extraction of a three fuzzy-reference vectors: maximal, mean and minimal. To classify a phoneme request, we calculate its degree of membership to all defined classes. The class of a phoneme request is, then, the one which maximizes one degree of membership calculated according to reference vectors. Different techniques of speech analysis are used for evaluation. Results show that fuzzy logic can provide a significant issue when mathematical rigor is not present as to the signal processing since the retained recognition rates was 90,85%, 22,96%, 98,57% and 91,73% for respectively MFCC, LPC, PLP and RASTA PLP.
A Novel Phonemes Classification Method Using Fuzzy Logic
doi:10.11648/j.cssp.20130201.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Ines Ben Fredj
Kaïs Ouni
A Novel Phonemes Classification Method Using Fuzzy Logic
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© Science Publishing Group
Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130201.13
A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems.
A current-mode image sensor architecture using a linear-logarithmic pixel in order to improve the dynamic range is presented. The pixel cell is based on a 3T active pixel structure with a PMOS readout transistor in the linear region of operation and a PMOS reset transistor that allows for a linear-logarithmic response. An intrascene dynamic range of 90dB is obtained with a pixel fill factor of 37%. The readout circuit is composed of a first-generation current conveyor, a current memory employed as a delta reset sampling unit, a differential amplifier used as an integrator and a dynamic comparator. The pixel response operating mode is determined in the column readout. A signal is sent to the digital processing unit as an indicator to determine the pixel response operating mode in order to allow the proper analog to digital conversion. The image lag effect observed in the pixel output current is removed by the delta reset sampling circuit. Experimental results, obtained from a test structure, are presented. The circuit was fabricated in a CMOS 0.35um process from Austria Microsystems.
Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit
doi:10.11648/j.cssp.20130201.13
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Elham Khamsehashari
Yves Audet
Response Mode Detection of a Linear-Logarithmic Image Sensor Using a Current-Mode Readout Circuit
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© Science Publishing Group
Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130201.12
Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was designed to optimize the first syntax element: the CoeffToken. ZLP implementation reduces CAVLD execution time to 21% instead of 41% from decoding time with a throughput of 1.28 MegaMB/s. In addition, the decoder speed was increased from 36 frames per second (fps) to 44 fps for a CIF compressed bitstream.
Context Adaptive Variable Length Decoding (CAVLD) module takes the lion chair of the H.264/AVC video decoder time due to its complexity. In order to ameliorate decoding speed, a new CAVLD algorithm and an efficient internal memory design were implemented on Digital Signal Processor (DSP). The proposed CAVLD algorithm, Zero Length Prefix (ZLP), was designed to optimize the first syntax element: the CoeffToken. ZLP implementation reduces CAVLD execution time to 21% instead of 41% from decoding time with a throughput of 1.28 MegaMB/s. In addition, the decoder speed was increased from 36 frames per second (fps) to 44 fps for a CIF compressed bitstream.
Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc
doi:10.11648/j.cssp.20130201.12
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Taheni Damak
Imen Werda
Mohamed Ali Ben Ayed
Nouri Masmoudi
Context Adaptive Variable Length Decoding Optimization and Implementation on Tms320c64 Dsp for H.264/Avc
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© Science Publishing Group
Novel Implementation of Recursive Discrete Wavelet Transform for Real Time Computation with Multicore Systems on Chip (SOC)
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130202.11
The discrete wavelet Transform (DWT) has been studied and developed in various scientific and engineering fields. Its multi-resolution and locality nature facilitates application required for progressiveness in capturing high-frequency details. However, when dealing with enormous data volume, the performance may drastically reduce. The multi-resolution sub-band encoding provided by DWT enables for higher compression ratios, and progressive transformation of signals. The widespread usage of the DWT has motivated the development of fast DWT algorithms and their tuning on all sorts of computer systems. However, this transformation comes at the expense of additional computational complexity. Achieving real-time or interactive compression/de-compression speed, therefore, requires a fast implementation of DWT that leverages emerging parallel hardware systems. The recent advancement in the consumer level multicore hardware is equipped with Single Instruction and Multiple Data (SIMD) power.In this study, Parallel Discrete Wavelet Transform has been developed with novel Adaptive Load Balancing Algorithm (ALBA). The DWT is parallelized, partitioned, mapped and scheduled on single core and Multicore. The Parallel DWT is developed in C# for single and Intel Quad cores as well as the combination of C and CUDA is implemented on GPU. This brings the significant performance on a consumer level PC without extra cost.
The discrete wavelet Transform (DWT) has been studied and developed in various scientific and engineering fields. Its multi-resolution and locality nature facilitates application required for progressiveness in capturing high-frequency details. However, when dealing with enormous data volume, the performance may drastically reduce. The multi-resolution sub-band encoding provided by DWT enables for higher compression ratios, and progressive transformation of signals. The widespread usage of the DWT has motivated the development of fast DWT algorithms and their tuning on all sorts of computer systems. However, this transformation comes at the expense of additional computational complexity. Achieving real-time or interactive compression/de-compression speed, therefore, requires a fast implementation of DWT that leverages emerging parallel hardware systems. The recent advancement in the consumer level multicore hardware is equipped with Single Instruction and Multiple Data (SIMD) power.In this study, Parallel Discrete Wavelet Transform has been developed with novel Adaptive Load Balancing Algorithm (ALBA). The DWT is parallelized, partitioned, mapped and scheduled on single core and Multicore. The Parallel DWT is developed in C# for single and Intel Quad cores as well as the combination of C and CUDA is implemented on GPU. This brings the significant performance on a consumer level PC without extra cost.
Novel Implementation of Recursive Discrete Wavelet Transform for Real Time Computation with Multicore Systems on Chip (SOC)
doi:10.11648/j.cssp.20130202.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Mohammad Wadood Majid
Golrokh Mirzaei
Mohsin M. Jamali
Novel Implementation of Recursive Discrete Wavelet Transform for Real Time Computation with Multicore Systems on Chip (SOC)
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© Science Publishing Group
Parallel Implementation of the Wideband DOA Algorithm on Single Core, Multicore, Gpu and Ibm Cell be Processor
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130202.12
The Multiple Signal Classification (MUSIC) algorithm is a powerful technique for determining the Direction of Arrival (DOA) of signals impinging on an antenna array.The algorithm is serial based, mathematically intensive, and requires substantial computing power to realize in real-time.Recently, multi-core processors are becoming more prevalent and af-fordable.The challenge of adapting existing serial based algorithms to parallel based algorithms suitable for today’s mul-ti-core processors is daunting. DOA algorithm has been implemented on Multicore (Intel Nehalem Quad Core), NVIDIA’s GPU GeForce GTX 260, and IBM Cell Broadband Engine Processor. This is in an effort to use DOA for real time applications. The DOA algorithm has been parallelized, partitioned, mapped, and scheduled on Multi-Core, GPU, and IBM Cell BE processor.The parallel algorithm is developed in C# for Intel Nehalem Quad Core, a combination of C and CUDA for GPU, and C++ for IBM Cell processor. The algorithm has also been implemented on single core for comparison purposes. Wideband DOA algorithm is implemented assuming 16 and 4 sensors using Uniform Linear Array (ULA).
The Multiple Signal Classification (MUSIC) algorithm is a powerful technique for determining the Direction of Arrival (DOA) of signals impinging on an antenna array.The algorithm is serial based, mathematically intensive, and requires substantial computing power to realize in real-time.Recently, multi-core processors are becoming more prevalent and af-fordable.The challenge of adapting existing serial based algorithms to parallel based algorithms suitable for today’s mul-ti-core processors is daunting. DOA algorithm has been implemented on Multicore (Intel Nehalem Quad Core), NVIDIA’s GPU GeForce GTX 260, and IBM Cell Broadband Engine Processor. This is in an effort to use DOA for real time applications. The DOA algorithm has been parallelized, partitioned, mapped, and scheduled on Multi-Core, GPU, and IBM Cell BE processor.The parallel algorithm is developed in C# for Intel Nehalem Quad Core, a combination of C and CUDA for GPU, and C++ for IBM Cell processor. The algorithm has also been implemented on single core for comparison purposes. Wideband DOA algorithm is implemented assuming 16 and 4 sensors using Uniform Linear Array (ULA).
Parallel Implementation of the Wideband DOA Algorithm on Single Core, Multicore, Gpu and Ibm Cell be Processor
doi:10.11648/j.cssp.20130202.12
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Mohammad Wadood Majid
Todd E. Schmuland
Mohsin M. Jamali
Parallel Implementation of the Wideband DOA Algorithm on Single Core, Multicore, Gpu and Ibm Cell be Processor
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© Science Publishing Group
Survey of Low Power Testing of VLSI Circuits
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130202.15
The System-On-Chip (SoC) revolution challenges both design and test engineers, especially in the area of power dissipation. Generally, a circuit or system consumes more power in test mode than in normal mode. This extra power consumption can give rise to severe hazards in circuit reliability or, in some cases, can provoke instant circuit damage. Moreover, it can create problems such as increased product cost, difficulty in performance verification, reduced autonomy of portable systems, and decrease of overall yield. This paper surveys about the available low power testing techniques during testing. It also suggests some advantages and disadvantages associated with every techniques
The System-On-Chip (SoC) revolution challenges both design and test engineers, especially in the area of power dissipation. Generally, a circuit or system consumes more power in test mode than in normal mode. This extra power consumption can give rise to severe hazards in circuit reliability or, in some cases, can provoke instant circuit damage. Moreover, it can create problems such as increased product cost, difficulty in performance verification, reduced autonomy of portable systems, and decrease of overall yield. This paper surveys about the available low power testing techniques during testing. It also suggests some advantages and disadvantages associated with every techniques
Survey of Low Power Testing of VLSI Circuits
doi:10.11648/j.cssp.20130202.15
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
P. Basker
A. Arulmurugan
Survey of Low Power Testing of VLSI Circuits
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© Science Publishing Group
Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130202.13
A hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents an overview of the digital block architectures of Multiple-Input Multiple-Output (MIMO) hardware simulators. First, the simple frequency architecture is presented and analyzed. Then, an improved frequency architecture, which works for streaming mode input signals, is considered. After, the time domain architecture is described and analyzed. The architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latencies are analyzed using Wireless Local Area Networks (WLAN) 802.11ac and Long Term Evolution System (LTE) signals. The frequency and the time approaches are compared and discussed, for indoor (using TGn channel models) and outdoor (using 3GPP-LTE channel models) environments. It is shown that the time domain architecture present the best solution for the design of the architecture of the hardware simulator digital block. Finally, a 2×2 MIMO time domain architecture is described and simulated with input signal that respects the bandwidth of the considered standards.
A hardware simulator facilitates the test and validation cycles by replicating channel artifacts in a controllable and repeatable laboratory environment. This paper presents an overview of the digital block architectures of Multiple-Input Multiple-Output (MIMO) hardware simulators. First, the simple frequency architecture is presented and analyzed. Then, an improved frequency architecture, which works for streaming mode input signals, is considered. After, the time domain architecture is described and analyzed. The architectures of the digital block are presented and designed on a Xilinx Virtex-IV Field Programmable Gate Array (FPGA). Their accuracy, occupation on the FPGA and latencies are analyzed using Wireless Local Area Networks (WLAN) 802.11ac and Long Term Evolution System (LTE) signals. The frequency and the time approaches are compared and discussed, for indoor (using TGn channel models) and outdoor (using 3GPP-LTE channel models) environments. It is shown that the time domain architecture present the best solution for the design of the architecture of the hardware simulator digital block. Finally, a 2×2 MIMO time domain architecture is described and simulated with input signal that respects the bandwidth of the considered standards.
Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures
doi:10.11648/j.cssp.20130202.13
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Bachir Habib
Gheorghe Zaharia
Ghais El Zein
Hardware Simulator for MIMO Propagation Channels: Time Domain Versus Frequency Domain Architectures
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© Science Publishing Group
A Performance Comparison of CMOS Voltage-Controlled Ring Oscillators for its Application to Generation and Distribution Clock Networks
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130202.14
In this work, a performance comparison of expanded CMOS voltage-controlled ring oscillators for non-resonant local clock generation and distribution networks is presented. Several differential and single-ended ring oscillators are designed and fabricated using long interconnection lines to achieve wide coverage chip. A test chip containing the several oscillators was fabricated using an Austria Microsystems (AMS) 0.35 μm CMOS technology. Experimental results show that it is possible to generate and distribute high frequency signals (GHz range) on a relativity large area (coverage) and low phase noise using non-resonant ring oscillators. This represents an attractive alternative for the design and implementation of local Clock Generation and Distribution Networks for systems on chip.
In this work, a performance comparison of expanded CMOS voltage-controlled ring oscillators for non-resonant local clock generation and distribution networks is presented. Several differential and single-ended ring oscillators are designed and fabricated using long interconnection lines to achieve wide coverage chip. A test chip containing the several oscillators was fabricated using an Austria Microsystems (AMS) 0.35 μm CMOS technology. Experimental results show that it is possible to generate and distribute high frequency signals (GHz range) on a relativity large area (coverage) and low phase noise using non-resonant ring oscillators. This represents an attractive alternative for the design and implementation of local Clock Generation and Distribution Networks for systems on chip.
A Performance Comparison of CMOS Voltage-Controlled Ring Oscillators for its Application to Generation and Distribution Clock Networks
doi:10.11648/j.cssp.20130202.14
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Mónico Linares Aranda
Oscar González Díaz
Carlos Ramón Báez Álvarez
A Performance Comparison of CMOS Voltage-Controlled Ring Oscillators for its Application to Generation and Distribution Clock Networks
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© Science Publishing Group
Implementation of Music Equalization Simulink Model on DSK6713
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130202.16
Audio equalization is a technique which consists of boosting or cutting certain frequency components of a given signal for sound quality enhancement. Equalizer is an electronic device or type of software that increases and decreases the power of sound waves. The paper deals with the analysis of music signals to develop insight on its frequency bands and auditory perception, through a case study of audio equalization. The graphic equalizer is designed through a Simulink model and is implemented in TMS320C6713 DSP board. This project is developed in order to deliver an insight on how audio equalization can be implemented with Matlab / Simulink for educational purposes.
Audio equalization is a technique which consists of boosting or cutting certain frequency components of a given signal for sound quality enhancement. Equalizer is an electronic device or type of software that increases and decreases the power of sound waves. The paper deals with the analysis of music signals to develop insight on its frequency bands and auditory perception, through a case study of audio equalization. The graphic equalizer is designed through a Simulink model and is implemented in TMS320C6713 DSP board. This project is developed in order to deliver an insight on how audio equalization can be implemented with Matlab / Simulink for educational purposes.
Implementation of Music Equalization Simulink Model on DSK6713
doi:10.11648/j.cssp.20130202.16
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Deepali Yoginath Loni
Implementation of Music Equalization Simulink Model on DSK6713
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© Science Publishing Group
The New Calculation Technique of Characteristics of Multichannel Measurer
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130203.11
A new calculation technique of accuracy characteristics of multichannel measurer was offered, ensuring essentially more exact results in comparison with the known ones. The expressions for the signal parameter maximum likelihood estimate bias and variance were found, in case of the multichannel reception of the quasidetermined or random signal and while the prior distribution of the informative parameter and the number of channels can be any. The influence of the value of the prior interval length and the number of channels on the accuracy of this estimate was investigated. The procedures were specified of the minimal channel number choice with the predetermined error of measurement. By statistical modeling methods the range of applicability of the theoretical formulae was established for the estimate characteristics, with the different numbers of channels and signal-to-noise ratios.
A new calculation technique of accuracy characteristics of multichannel measurer was offered, ensuring essentially more exact results in comparison with the known ones. The expressions for the signal parameter maximum likelihood estimate bias and variance were found, in case of the multichannel reception of the quasidetermined or random signal and while the prior distribution of the informative parameter and the number of channels can be any. The influence of the value of the prior interval length and the number of channels on the accuracy of this estimate was investigated. The procedures were specified of the minimal channel number choice with the predetermined error of measurement. By statistical modeling methods the range of applicability of the theoretical formulae was established for the estimate characteristics, with the different numbers of channels and signal-to-noise ratios.
The New Calculation Technique of Characteristics of Multichannel Measurer
doi:10.11648/j.cssp.20130203.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
O.V Chernoyarov
M Vaculik
A.E Rozanov
The New Calculation Technique of Characteristics of Multichannel Measurer
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© Science Publishing Group
Design of Non-Linear Filter in the Problem of Structural Identification of Biomedical Signals with Locally Concentrated Properties
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130203.12
In this paper we propose a generalized method of structural identification of biomedical signals with locally concentrated properties using a digital non-linear filter. The experimental verification of the detecting function was performed by using different ways to describe the model of the desired class of structural elements.
In this paper we propose a generalized method of structural identification of biomedical signals with locally concentrated properties using a digital non-linear filter. The experimental verification of the detecting function was performed by using different ways to describe the model of the desired class of structural elements.
Design of Non-Linear Filter in the Problem of Structural Identification of Biomedical Signals with Locally Concentrated Properties
doi:10.11648/j.cssp.20130203.12
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Anatoly Povoroznyuk
Anna Filatova
Yuri Myrgorod
Design of Non-Linear Filter in the Problem of Structural Identification of Biomedical Signals with Locally Concentrated Properties
2
3
92
92
2014-01-01
2014-01-01
10.11648/j.cssp.20130203.12
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130203.12
© Science Publishing Group
Appearance and Shape Based Face Recognition Using Backpropagation Learning Neural Network Algorithm with Different Lighting Variations
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130204.11
This paper presents an approach of face recognition system using Backpropagation learning neural network algorithm introducing appearance and shape based facial features to enhance the efficiency with different lighting variations. To extract the appearance and shape based facial feature, Active Appearance Model (AMM) has been applied. Appearance based facial feature is useful when the lighting condition is uniform. On the other hand when the environmental lighting condition is different, shape based facial features can perform better in comparison with appearance based feature because shape based structure is not changed with lighting variations. In this work, both appearance and shape based facial features are combined to enhance the recognition efficiency for various light variant system. For dimensionality reduction of appearance and shape based facial features, Principal Component Analysis (PCA) method has been used. Finally, error Backpropagation learning feed forward neural network algorithm has been used to classify the facial features. To measure the performance of the proposed appearance and shape based facial recognition system, VALID database has been used where each face has been captured with four different lighting variations. Experiments have been performed with Appearance-Only, Shape-Only and combined Appearance-Shape based feature and performance of the proposed system shows the superiority of the face recognition system.
This paper presents an approach of face recognition system using Backpropagation learning neural network algorithm introducing appearance and shape based facial features to enhance the efficiency with different lighting variations. To extract the appearance and shape based facial feature, Active Appearance Model (AMM) has been applied. Appearance based facial feature is useful when the lighting condition is uniform. On the other hand when the environmental lighting condition is different, shape based facial features can perform better in comparison with appearance based feature because shape based structure is not changed with lighting variations. In this work, both appearance and shape based facial features are combined to enhance the recognition efficiency for various light variant system. For dimensionality reduction of appearance and shape based facial features, Principal Component Analysis (PCA) method has been used. Finally, error Backpropagation learning feed forward neural network algorithm has been used to classify the facial features. To measure the performance of the proposed appearance and shape based facial recognition system, VALID database has been used where each face has been captured with four different lighting variations. Experiments have been performed with Appearance-Only, Shape-Only and combined Appearance-Shape based feature and performance of the proposed system shows the superiority of the face recognition system.
Appearance and Shape Based Face Recognition Using Backpropagation Learning Neural Network Algorithm with Different Lighting Variations
doi:10.11648/j.cssp.20130204.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Md. Rabiul Islam
Rizoan Toufiq
Md. Abdus Sobhan
Appearance and Shape Based Face Recognition Using Backpropagation Learning Neural Network Algorithm with Different Lighting Variations
2
4
99
99
2014-01-01
2014-01-01
10.11648/j.cssp.20130204.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130204.11
© Science Publishing Group
Measuring the Main Parameters of the Human Body in Images by Canny Edge Detector
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130205.11
The main parameters of the human body can identify and estimate images easier. In this research, various images of people (short, long, lean and obese) were examined and their main features were extracted from the images. In this paper, four types of people in 2D dimension image will be tested and proposed. The system will extract the size and the advantage of them (such as: tall fat, short fat, tall thin and short thin) from images. Fat and thin, according to their result from the human body that has been extract from image, will be obtained. Also the system extract every size of human body such as length, width and shown them in the output.
The main parameters of the human body can identify and estimate images easier. In this research, various images of people (short, long, lean and obese) were examined and their main features were extracted from the images. In this paper, four types of people in 2D dimension image will be tested and proposed. The system will extract the size and the advantage of them (such as: tall fat, short fat, tall thin and short thin) from images. Fat and thin, according to their result from the human body that has been extract from image, will be obtained. Also the system extract every size of human body such as length, width and shown them in the output.
Measuring the Main Parameters of the Human Body in Images by Canny Edge Detector
doi:10.11648/j.cssp.20130205.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Mousa Mojarrad
Sedigheh Kargar
Measuring the Main Parameters of the Human Body in Images by Canny Edge Detector
2
5
105
105
2014-01-01
2014-01-01
10.11648/j.cssp.20130205.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130205.11
© Science Publishing Group
Four-Channel Sub-Band Coding with Combination of [8 8 4 2] for Digital Audio Signal Processing
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130205.12
This paper presents the research result for the four-channel sub-band coding (SBC) with a combination of share [8 8 4 2]. The research method is based on the Wavelet multi-resolution analysis using ATRAC3 algorithm using filters designed by a novel technique of filter bank called “transit-window”. The advantages of the method are as: reduction of ripple of output amplitude response and information lossless at the interface region between two filters. Especially, under wavelet analysis with the change in the base-2 exponential partition factor from SBC [4 4 2] is to SBC [8 8 4 2] and it may be used to rec-ord/read audio and digitally broadcast on internet. The result is obtained by using the Matlab/Simulink modeling for the method.
This paper presents the research result for the four-channel sub-band coding (SBC) with a combination of share [8 8 4 2]. The research method is based on the Wavelet multi-resolution analysis using ATRAC3 algorithm using filters designed by a novel technique of filter bank called “transit-window”. The advantages of the method are as: reduction of ripple of output amplitude response and information lossless at the interface region between two filters. Especially, under wavelet analysis with the change in the base-2 exponential partition factor from SBC [4 4 2] is to SBC [8 8 4 2] and it may be used to rec-ord/read audio and digitally broadcast on internet. The result is obtained by using the Matlab/Simulink modeling for the method.
Four-Channel Sub-Band Coding with Combination of [8 8 4 2] for Digital Audio Signal Processing
doi:10.11648/j.cssp.20130205.12
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Pham Ngoc Thang
Four-Channel Sub-Band Coding with Combination of [8 8 4 2] for Digital Audio Signal Processing
2
5
111
111
2014-01-01
2014-01-01
10.11648/j.cssp.20130205.12
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130205.12
© Science Publishing Group
Palmprint Recognition Using Multiscale Transform, Linear Discriminate Analysis, and Neural Network
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130205.13
Palmprint recognition is gaining grounds as a biometric system for forensic and commercial applications. Palmprint recognition addressed the recognition issue using low and high resolution images. This paper uses PolyU hyperspectral palmprint database, and applies back-propagation neural network for recognition, linear discriminate analysis for dimensionality reduction, and 2D discrete wavelet, ridgelet, curvelet, and contourlet for feature extraction. The recognition rate accuracy shows that contourlet outperforms other transforms.
Palmprint recognition is gaining grounds as a biometric system for forensic and commercial applications. Palmprint recognition addressed the recognition issue using low and high resolution images. This paper uses PolyU hyperspectral palmprint database, and applies back-propagation neural network for recognition, linear discriminate analysis for dimensionality reduction, and 2D discrete wavelet, ridgelet, curvelet, and contourlet for feature extraction. The recognition rate accuracy shows that contourlet outperforms other transforms.
Palmprint Recognition Using Multiscale Transform, Linear Discriminate Analysis, and Neural Network
doi:10.11648/j.cssp.20130205.13
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
Hatem Elaydi
Mohanad A. M. Abukmeil
Mohammed Alhanjouri
Palmprint Recognition Using Multiscale Transform, Linear Discriminate Analysis, and Neural Network
2
5
118
118
2014-01-01
2014-01-01
10.11648/j.cssp.20130205.13
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20130205.13
© Science Publishing Group
Corner Effect in Multiplier SOI-Fin FETs
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140301.11
SOI-Multi-FinFET was analyzed by a three-dimensional numerical device simulator and its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current were compared for single-fin, three-fin and five-fin FET to investigate the influence of fins number on corner effect in Dual-gate SOI Multi-FinFET, and we provide a comparison with a Tri-gate SOI Multi-FinFET structure.
SOI-Multi-FinFET was analyzed by a three-dimensional numerical device simulator and its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current were compared for single-fin, three-fin and five-fin FET to investigate the influence of fins number on corner effect in Dual-gate SOI Multi-FinFET, and we provide a comparison with a Tri-gate SOI Multi-FinFET structure.
Corner Effect in Multiplier SOI-Fin FETs
doi:10.11648/j.cssp.20140301.11
Science Journal of Circuits, Systems and Signal Processing
2014-01-01
© Science Publishing Group
A.N. Moulai Khatir
A. Guen-Bouazza
B. Bouazza
Corner Effect in Multiplier SOI-Fin FETs
3
1
4
4
2014-01-01
2014-01-01
10.11648/j.cssp.20140301.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140301.11
© Science Publishing Group
An Adaptive Fuzzy Logic Quaternion Scaled Unscented Kalman Filtering for Inertial Navigation System, GPS and Magnetometer Sensors Integration
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140302.11
In this paper, we present a technique based on fuzzy logic to improve the performance of the inertial navigation system integrated with GPS, and magnetometer. The proposed fuzzy technique is primarily used to predict position and velocity measurements during GPS outage signals. As long as the GPS measurements are available, the Q-SUKF of INS/GPS/MAG (MAG: magnetometer) integrated system operates efficiently and provides precise navigation states estimation. Nevertheless, during GPS outage signals, the proposed fuzzy technique is adapted to the Q-SUKF to obtain the (A) (FL) QSUKF (Adaptive Fuzzy Logic Quaternion Scaled Unscented Kalman Filter) in order to correct the degradation of the performance of the algorithm. The adaptive fuzzy logic attributes values to the measurements covariance matrix in order to determine the gain of the filter. It will decrease the measurement noise variance of the Kalman filter and then improves eventually the accuracy of the integrated navigation system states estimation. Finally, an experimental part on the use of the proposed fuzzy technical with the Q-SUKF has been validated. Several GPS outages with duration of 30s have been simulated to study the behavior of the proposed filter. In addition, an initial attitude error of 60 degrees is given in each axis to test the robustness of the filter proposed under large attitude errors. The results of the experimental validation have shown the effectiveness and the significant impact of the (A) (FL) Q-SUKF in the reduction of the drift errors estimation of the position and velocity in case of GPS outages in the tested scenarios.
In this paper, we present a technique based on fuzzy logic to improve the performance of the inertial navigation system integrated with GPS, and magnetometer. The proposed fuzzy technique is primarily used to predict position and velocity measurements during GPS outage signals. As long as the GPS measurements are available, the Q-SUKF of INS/GPS/MAG (MAG: magnetometer) integrated system operates efficiently and provides precise navigation states estimation. Nevertheless, during GPS outage signals, the proposed fuzzy technique is adapted to the Q-SUKF to obtain the (A) (FL) QSUKF (Adaptive Fuzzy Logic Quaternion Scaled Unscented Kalman Filter) in order to correct the degradation of the performance of the algorithm. The adaptive fuzzy logic attributes values to the measurements covariance matrix in order to determine the gain of the filter. It will decrease the measurement noise variance of the Kalman filter and then improves eventually the accuracy of the integrated navigation system states estimation. Finally, an experimental part on the use of the proposed fuzzy technical with the Q-SUKF has been validated. Several GPS outages with duration of 30s have been simulated to study the behavior of the proposed filter. In addition, an initial attitude error of 60 degrees is given in each axis to test the robustness of the filter proposed under large attitude errors. The results of the experimental validation have shown the effectiveness and the significant impact of the (A) (FL) Q-SUKF in the reduction of the drift errors estimation of the position and velocity in case of GPS outages in the tested scenarios.
An Adaptive Fuzzy Logic Quaternion Scaled Unscented Kalman Filtering for Inertial Navigation System, GPS and Magnetometer Sensors Integration
doi:10.11648/j.cssp.20140302.11
Science Journal of Circuits, Systems and Signal Processing
2014-09-29
© Science Publishing Group
Wassim Khoder
Bassem Jida
An Adaptive Fuzzy Logic Quaternion Scaled Unscented Kalman Filtering for Inertial Navigation System, GPS and Magnetometer Sensors Integration
3
2
13
13
2014-09-29
2014-09-29
10.11648/j.cssp.20140302.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140302.11
© Science Publishing Group
Novel Real-Time Closed-Loop Device Linearization via Predictive Pre-Distortion
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140303.11
In this paper, a novel real-time closed-loop device linearization technique has presented. In this paper the focus application is on AM/AM and AM/PM linearization of power amplifiers (PA) and/or radio transmitters. In such an application, the novel approach performs on-the-fly measurement-and-prediction of the nonlinear characteristics of the PA, stores such non-linear characteristics and calculates their inverse functions in order to pre-distort the base-band amplitude and phase signals modulating the PA such that the combination, or the resultant, of the pre-distorter and the PA leads to a linear behavior at the output of the PA. The predictive nature of the presented approach overcomes the inevitable delay between the time a measurement is collected through the feedback loop and the time it has taken place at the output of the forward loop, which is a must-have delay encountered in any natural causal system. Such a delay results in imperfect on-the-fly pre-distortion of the output signal due to the mismatch between the applied pre-distortion, which has been based on a past measurement, and the actual effect of the non-linearity at the time the signal is produced [5]. In addition, this novel approach promises the advantage of operating a highly non-linear (compressed) PA - hence, highly efficient - with minimal factory pre-calibration. We present a model of our predictor based approach and evaluate its performance for a GSM/EDGE/UMTS a cellular transmitter scenario, where the performance requirements on the transmitted signal are stringent and distortion due to non-linearity must be minimized. The key performance metrics we evaluate have mostly been based on the GSM/EDGE/UMTS requirements, such as the Error Vector Magnitude (EVM), Switching Transients (ST), and Adjacent Channel Power Ratio (ACPR), transmit time mask, modulation spectrum and power-added efficiency (PAE). Although the focus of the numerical results in this paper is on the GSM/EDGE/UMTS application, the novel approach discussed is applicable to any TDMA or TDD system where switching transients and spectral performance is tightly controlled.
In this paper, a novel real-time closed-loop device linearization technique has presented. In this paper the focus application is on AM/AM and AM/PM linearization of power amplifiers (PA) and/or radio transmitters. In such an application, the novel approach performs on-the-fly measurement-and-prediction of the nonlinear characteristics of the PA, stores such non-linear characteristics and calculates their inverse functions in order to pre-distort the base-band amplitude and phase signals modulating the PA such that the combination, or the resultant, of the pre-distorter and the PA leads to a linear behavior at the output of the PA. The predictive nature of the presented approach overcomes the inevitable delay between the time a measurement is collected through the feedback loop and the time it has taken place at the output of the forward loop, which is a must-have delay encountered in any natural causal system. Such a delay results in imperfect on-the-fly pre-distortion of the output signal due to the mismatch between the applied pre-distortion, which has been based on a past measurement, and the actual effect of the non-linearity at the time the signal is produced [5]. In addition, this novel approach promises the advantage of operating a highly non-linear (compressed) PA - hence, highly efficient - with minimal factory pre-calibration. We present a model of our predictor based approach and evaluate its performance for a GSM/EDGE/UMTS a cellular transmitter scenario, where the performance requirements on the transmitted signal are stringent and distortion due to non-linearity must be minimized. The key performance metrics we evaluate have mostly been based on the GSM/EDGE/UMTS requirements, such as the Error Vector Magnitude (EVM), Switching Transients (ST), and Adjacent Channel Power Ratio (ACPR), transmit time mask, modulation spectrum and power-added efficiency (PAE). Although the focus of the numerical results in this paper is on the GSM/EDGE/UMTS application, the novel approach discussed is applicable to any TDMA or TDD system where switching transients and spectral performance is tightly controlled.
Novel Real-Time Closed-Loop Device Linearization via Predictive Pre-Distortion
doi:10.11648/j.cssp.20140303.11
Science Journal of Circuits, Systems and Signal Processing
2014-10-27
© Science Publishing Group
Walid Ahmed
Ajit Reddy
Novel Real-Time Closed-Loop Device Linearization via Predictive Pre-Distortion
3
3
25
25
2014-10-27
2014-10-27
10.11648/j.cssp.20140303.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140303.11
© Science Publishing Group
Fault Reduction in Nonoscale VLSI Interconnection by Using Carbon Nanotubes Technology
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140304.11
As the VLSI technology scales down, significant challenges are facing the fabrication, modeling, and performance of the integrated circuits. One of the major challenges for the continuiation of the Moore’s law is “interconnects” at nano-scale. Interconnects become as important as transistors in the current technologies and will dominate the chip performance at the future technologies. Beside their eletrical performance, their mechanical performnace will be important at the nano-scale. Wires should be resilient enough to cope with Back-End-Of-Line (BEOL) processes. Nano-technology has offered us many solutions to current technology problems. One of the major gift of this technology is Carbon Nanotubes (CNT). CNTs are a promising candidate to replace copper interconnects. They not only provide us with ballistic transport for semiconductors, but also have better mechanical performance. In this paper, we study the mechanical reliability of the CNT interconnects and compare it with their copper conterparts.
As the VLSI technology scales down, significant challenges are facing the fabrication, modeling, and performance of the integrated circuits. One of the major challenges for the continuiation of the Moore’s law is “interconnects” at nano-scale. Interconnects become as important as transistors in the current technologies and will dominate the chip performance at the future technologies. Beside their eletrical performance, their mechanical performnace will be important at the nano-scale. Wires should be resilient enough to cope with Back-End-Of-Line (BEOL) processes. Nano-technology has offered us many solutions to current technology problems. One of the major gift of this technology is Carbon Nanotubes (CNT). CNTs are a promising candidate to replace copper interconnects. They not only provide us with ballistic transport for semiconductors, but also have better mechanical performance. In this paper, we study the mechanical reliability of the CNT interconnects and compare it with their copper conterparts.
Fault Reduction in Nonoscale VLSI Interconnection by Using Carbon Nanotubes Technology
doi:10.11648/j.cssp.20140304.11
Science Journal of Circuits, Systems and Signal Processing
2014-11-29
© Science Publishing Group
Behzad Lotfy
Houshang Salehi
Fault Reduction in Nonoscale VLSI Interconnection by Using Carbon Nanotubes Technology
3
4
30
30
2014-11-29
2014-11-29
10.11648/j.cssp.20140304.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140304.11
© Science Publishing Group
Construction of Flexible Type II and III QC-LDPC Codes
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140305.11
Type II and III low-density parity-check codes (QC-LDPC) codes have been shown to have better minimum distance compared to Type I QC-LDPC codes. This article presents a highly flexible method for constructing high-girth type II and III QC-LDPC codes. The proposed algorithm establishes constraints to be observed in creating a bipartite graph of a given girth. The algorithm is by far more flexible in constructing a wide range (rates and lengths) of type II and III QC-LDPC codes compared to existing methods. Although the proposed algorithm uses a search approach to construct codes, it generally successfully constructs a code even at low code lengths. Constructed codes show better bit error rate performances compared to type I codes as expected.
Type II and III low-density parity-check codes (QC-LDPC) codes have been shown to have better minimum distance compared to Type I QC-LDPC codes. This article presents a highly flexible method for constructing high-girth type II and III QC-LDPC codes. The proposed algorithm establishes constraints to be observed in creating a bipartite graph of a given girth. The algorithm is by far more flexible in constructing a wide range (rates and lengths) of type II and III QC-LDPC codes compared to existing methods. Although the proposed algorithm uses a search approach to construct codes, it generally successfully constructs a code even at low code lengths. Constructed codes show better bit error rate performances compared to type I codes as expected.
Construction of Flexible Type II and III QC-LDPC Codes
doi:10.11648/j.cssp.20140305.11
Science Journal of Circuits, Systems and Signal Processing
2014-11-29
© Science Publishing Group
Gabofetswe Malema
Nkwebi Motlogelwa
Construction of Flexible Type II and III QC-LDPC Codes
3
5
34
34
2014-11-29
2014-11-29
10.11648/j.cssp.20140305.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140305.11
© Science Publishing Group
Non-Separable 3D Integer Wavelet Transform for Lossless Data Compression
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140306.11
This paper proposes a three-dimensional (3D) integer wavelet transform with reduced amount of rounding noise. Non-separable multi-dimensional lifting structures are introduced to decrease the total number of lifting steps. Since the lifting step contains a rounding operation, variance of the rounding noise generated due to the rounding operation inside the transform is reduced. This paper also investigates performance of the transform from various aspects such as 1) variance of the noise in frequency domain and those in pixel domain, 2) the rate distortion curve in lossy coding mode and the entropy rate in lossless coding mode, 3) computational time of the transforms, and 4) feature comparison with other methods. The proposed wavelet transform has a merit that its output signal, apart from the rounding noise, is exactly the same as the conventional separable structure which is a cascade of 1D structure. Due to this compatibility, it becomes possible to utilize legacy of previously designed 1D wavelet transforms with preferable properties such as the regularity. Furthermore, total amount of the rounding noise which is generated due to integer expression of signal values inside the transform is significantly reduced. This is because the total number of rounding operations is decreased by introducing the non-separable multi-dimensional lifting structure which includes multi-dimensional memory accessing. It contributes to increase coding performance of a system based on the 3D wavelet transform. As a result of experiments, it was observed that the proposed method increases performance of data compression of various 3D input signals.
This paper proposes a three-dimensional (3D) integer wavelet transform with reduced amount of rounding noise. Non-separable multi-dimensional lifting structures are introduced to decrease the total number of lifting steps. Since the lifting step contains a rounding operation, variance of the rounding noise generated due to the rounding operation inside the transform is reduced. This paper also investigates performance of the transform from various aspects such as 1) variance of the noise in frequency domain and those in pixel domain, 2) the rate distortion curve in lossy coding mode and the entropy rate in lossless coding mode, 3) computational time of the transforms, and 4) feature comparison with other methods. The proposed wavelet transform has a merit that its output signal, apart from the rounding noise, is exactly the same as the conventional separable structure which is a cascade of 1D structure. Due to this compatibility, it becomes possible to utilize legacy of previously designed 1D wavelet transforms with preferable properties such as the regularity. Furthermore, total amount of the rounding noise which is generated due to integer expression of signal values inside the transform is significantly reduced. This is because the total number of rounding operations is decreased by introducing the non-separable multi-dimensional lifting structure which includes multi-dimensional memory accessing. It contributes to increase coding performance of a system based on the 3D wavelet transform. As a result of experiments, it was observed that the proposed method increases performance of data compression of various 3D input signals.
Non-Separable 3D Integer Wavelet Transform for Lossless Data Compression
doi:10.11648/j.cssp.20140306.11
Science Journal of Circuits, Systems and Signal Processing
2015-01-20
© Science Publishing Group
Teerapong Orachon
Suvit Poomrittigul
Taichi Yoshida
Masahiro Iwahashi
Somchart Chokchaitam
Non-Separable 3D Integer Wavelet Transform for Lossless Data Compression
3
6
46
46
2015-01-20
2015-01-20
10.11648/j.cssp.20140306.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20140306.11
© Science Publishing Group
Analysis of Particle Swarm Optimization in Block Matching Algorithms for Video Coding
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.13
Particle Swarm Optimization (PSO) is global optimization technique based on swarm intelligence. It simulates the behavior of bird flocking. It is widely accepted and focused by researchers due to its profound intelligence and simple algorithm structure. Currently PSO has been implemented in a wide range of research areas such as functional optimization, pattern recognition, neural network training and fuzzy system control etc.,. In video processing PSO is used to find the best matching block in Block matching algorithm, bit rate optimization for MPEG 1/2, object tracking and data clustering. In this paper the usage of PSO in Block matching algorithms for video compression is analyzed and the results are compared with the existing techniques.
Particle Swarm Optimization (PSO) is global optimization technique based on swarm intelligence. It simulates the behavior of bird flocking. It is widely accepted and focused by researchers due to its profound intelligence and simple algorithm structure. Currently PSO has been implemented in a wide range of research areas such as functional optimization, pattern recognition, neural network training and fuzzy system control etc.,. In video processing PSO is used to find the best matching block in Block matching algorithm, bit rate optimization for MPEG 1/2, object tracking and data clustering. In this paper the usage of PSO in Block matching algorithms for video compression is analyzed and the results are compared with the existing techniques.
Analysis of Particle Swarm Optimization in Block Matching Algorithms for Video Coding
doi:10.11648/j.cssp.s.2014030601.13
Science Journal of Circuits, Systems and Signal Processing
2014-11-12
© Science Publishing Group
Kakalakannan Damodharan
Thamarai Muthusamy
Analysis of Particle Swarm Optimization in Block Matching Algorithms for Video Coding
3
6
23
23
2014-11-12
2014-11-12
10.11648/j.cssp.s.2014030601.13
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.13
© Science Publishing Group
Intelligent Traffic Light Controller Based on MCA Associative Memory
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.12
Traffic in urban areas is mainly regularized by traffic lights, which may lead to the unnecessary long waiting times for vehicles if not efficiently configured. This inefficient configuration is unfortunately still the case in a lot of urban areas where most of the traffic lights are based on a ‘fixed cycle’ protocol. This paper aims to design an intelligent controller of an intersection in a specific city using associative memory with multi-connect architecture via using this structure of neural network the intelligent controller can adapt to all street cases, which may be faced during its work. Not like other controllers, this work uses small associative memory. It will learn all street traffic conditions. The controller uses virtual data about the traffic condition of each street in the intersection. Thus, in an image processing module this video camera will provide visual information. This information will be processed to extract data about the traffic jam. This data will be represented in a look- up table, then smart decisions are taken when the intersection management determines the street case of each street at the intersection based on this look- up table.
Traffic in urban areas is mainly regularized by traffic lights, which may lead to the unnecessary long waiting times for vehicles if not efficiently configured. This inefficient configuration is unfortunately still the case in a lot of urban areas where most of the traffic lights are based on a ‘fixed cycle’ protocol. This paper aims to design an intelligent controller of an intersection in a specific city using associative memory with multi-connect architecture via using this structure of neural network the intelligent controller can adapt to all street cases, which may be faced during its work. Not like other controllers, this work uses small associative memory. It will learn all street traffic conditions. The controller uses virtual data about the traffic condition of each street in the intersection. Thus, in an image processing module this video camera will provide visual information. This information will be processed to extract data about the traffic jam. This data will be represented in a look- up table, then smart decisions are taken when the intersection management determines the street case of each street at the intersection based on this look- up table.
Intelligent Traffic Light Controller Based on MCA Associative Memory
doi:10.11648/j.cssp.s.2014030601.12
Science Journal of Circuits, Systems and Signal Processing
2014-11-06
© Science Publishing Group
Emad I. Abdul Kareem
Safana H. Abbas
Salman Mahmood Salman
Intelligent Traffic Light Controller Based on MCA Associative Memory
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16
16
2014-11-06
2014-11-06
10.11648/j.cssp.s.2014030601.12
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.12
© Science Publishing Group
Adaptive Unsupervised Fuzzy C Mean Based Image Segmentation
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.11
In this paper an optimized method for unsupervised image clustering is proposed. Generally a Novel Fuzzy C Means (FCM) or FCM based clustering algorithm are used for clustering based image segmentation but these algorithms have a disadvantage of depending upon supervised user inputs such as number of clusters. Our proposed algorithm enhances an unsupervised preliminary process known as Double Cluster Tree Structure (DCTS) whose boundary structure process handled before each iteration of FCM clustering. The combined structure of these two algorithms form Adaptive Unsupervised Fuzzy C Means (AUFCM), AUFCM analyzes and segments whole dataset (image) in an unsupervised manner. The results of this algorithm show a significant improvement in segmentation Performance.
In this paper an optimized method for unsupervised image clustering is proposed. Generally a Novel Fuzzy C Means (FCM) or FCM based clustering algorithm are used for clustering based image segmentation but these algorithms have a disadvantage of depending upon supervised user inputs such as number of clusters. Our proposed algorithm enhances an unsupervised preliminary process known as Double Cluster Tree Structure (DCTS) whose boundary structure process handled before each iteration of FCM clustering. The combined structure of these two algorithms form Adaptive Unsupervised Fuzzy C Means (AUFCM), AUFCM analyzes and segments whole dataset (image) in an unsupervised manner. The results of this algorithm show a significant improvement in segmentation Performance.
Adaptive Unsupervised Fuzzy C Mean Based Image Segmentation
doi:10.11648/j.cssp.s.2014030601.11
Science Journal of Circuits, Systems and Signal Processing
2014-10-20
© Science Publishing Group
Arunkumar Rajendran
Thamarai Muthusamy
Adaptive Unsupervised Fuzzy C Mean Based Image Segmentation
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5
5
2014-10-20
2014-10-20
10.11648/j.cssp.s.2014030601.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.11
© Science Publishing Group
Super-Resolution Method Based on Edge Feature for High Resolution Imaging
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.14
Super-resolution is recently one of the most attractive research themes. An image interpolation method using co-variance between neighboring pixels, so called New Edge-Directed Interpolation (NEDI), was proposed. It enables to interpolate pixels quantitatively regardless of edge features. However, in estimation of predictive coefficients and determination of NEDI’s local window size, edge features are not made consideration. So, NEDI cannot necessarily satisfy quality of picture. In order to overcome this problem, we propose a new intra-frame super-resolution method that window sizes and configurations are adaptively determined depending on edge strengths and orientations. Experimental simulation shows that the proposed method can interpolate pixels more clearly than NEDI for many kinds of edges.
Super-resolution is recently one of the most attractive research themes. An image interpolation method using co-variance between neighboring pixels, so called New Edge-Directed Interpolation (NEDI), was proposed. It enables to interpolate pixels quantitatively regardless of edge features. However, in estimation of predictive coefficients and determination of NEDI’s local window size, edge features are not made consideration. So, NEDI cannot necessarily satisfy quality of picture. In order to overcome this problem, we propose a new intra-frame super-resolution method that window sizes and configurations are adaptively determined depending on edge strengths and orientations. Experimental simulation shows that the proposed method can interpolate pixels more clearly than NEDI for many kinds of edges.
Super-Resolution Method Based on Edge Feature for High Resolution Imaging
doi:10.11648/j.cssp.s.2014030601.14
Science Journal of Circuits, Systems and Signal Processing
2014-12-27
© Science Publishing Group
Ryohei Yamaguchi
Teppei Sato
Atsushi Koike
Naoya Wada
Hitomi Murakami
Super-Resolution Method Based on Edge Feature for High Resolution Imaging
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6
29
29
2014-12-27
2014-12-27
10.11648/j.cssp.s.2014030601.14
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.14
© Science Publishing Group
Stream Flow Painting from Real Images Using Anisotropic Band-Pass Filter
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.15
A new non-photorealistic rendering algorithm is proposed for creating artistic painting with soft stream flow from natural color images. The algorithm consists mainly of two stages, that is, a revised bilateral filter called trilateral filter is firstly applied to original color image for creating drawings using gradient information and then a DoG-like band-pass filter is adapted for generating soft stream flow along the eigenvectors and therefore the image is smoothed along curved stream lines. The proposed trilateral filter is an extension of bilateral filter by incorporating gradient space. On the other hand, DoG-like band-pass filter is designed by applying eigenvectors and eigenvalues of a structure tensor matrix calculated at each pixel. Our approach effectively preserves image main structures while smoothing image regions in an anisotropic way. Even in regions with lower contrast, stream flow-like potential structures are also well produced due to a gradient relaxation. The experiments demonstrate that the proposed algorithm works well and produces good and pleasant visual results.
A new non-photorealistic rendering algorithm is proposed for creating artistic painting with soft stream flow from natural color images. The algorithm consists mainly of two stages, that is, a revised bilateral filter called trilateral filter is firstly applied to original color image for creating drawings using gradient information and then a DoG-like band-pass filter is adapted for generating soft stream flow along the eigenvectors and therefore the image is smoothed along curved stream lines. The proposed trilateral filter is an extension of bilateral filter by incorporating gradient space. On the other hand, DoG-like band-pass filter is designed by applying eigenvectors and eigenvalues of a structure tensor matrix calculated at each pixel. Our approach effectively preserves image main structures while smoothing image regions in an anisotropic way. Even in regions with lower contrast, stream flow-like potential structures are also well produced due to a gradient relaxation. The experiments demonstrate that the proposed algorithm works well and produces good and pleasant visual results.
Stream Flow Painting from Real Images Using Anisotropic Band-Pass Filter
doi:10.11648/j.cssp.s.2014030601.15
Science Journal of Circuits, Systems and Signal Processing
2015-02-27
© Science Publishing Group
Xiaohua Zhang
Ning Xie
Yuelan Xin
Heming Huang
Stream Flow Painting from Real Images Using Anisotropic Band-Pass Filter
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2015-02-27
2015-02-27
10.11648/j.cssp.s.2014030601.15
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.s.2014030601.15
© Science Publishing Group
Speech Enhancement Using Hilbert Spectrum and Wavelet Packet Based Soft-Thresholding
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150401.12
A method of and a system for speech enhancement consists of Hilbert spectrum and wavelet packet analysis is studied. We implement ISA to separate speech and interfering signals from single mixture and wavelet packet based soft-thresholding algorithm to enhance the quality of target speech. The mixed signal is projected onto time-frequency (TF) space using empirical mode decomposition (EMD) based Hilbert spectrum (HS). Then a finite set of independent basis vectors are derived from the TF space by applying principal component analysis (PCA) and independent component analysis (ICA) sequentially. The vectors are clustered using hierarchical clustering to represent the independent subspaces corresponding to the component sources in the mixture. However, the speech quality of the separation algorithm is not enough and contains some residual noises. Therefore, in the next stage, the target speech is enhanced using wavelet packet decomposition (WPD) method where the speech activity is monitored by updating noise or unwanted signals statistics. The mode mixing issue of traditional EMD is addressed and resolved using ensemble EMD. The proposed algorithm is also tested using short-time Fourier transform (STFT) based spectrogram method. The simulation results show a noticeable performance in the field of audio source separation and speech enhancement.
A method of and a system for speech enhancement consists of Hilbert spectrum and wavelet packet analysis is studied. We implement ISA to separate speech and interfering signals from single mixture and wavelet packet based soft-thresholding algorithm to enhance the quality of target speech. The mixed signal is projected onto time-frequency (TF) space using empirical mode decomposition (EMD) based Hilbert spectrum (HS). Then a finite set of independent basis vectors are derived from the TF space by applying principal component analysis (PCA) and independent component analysis (ICA) sequentially. The vectors are clustered using hierarchical clustering to represent the independent subspaces corresponding to the component sources in the mixture. However, the speech quality of the separation algorithm is not enough and contains some residual noises. Therefore, in the next stage, the target speech is enhanced using wavelet packet decomposition (WPD) method where the speech activity is monitored by updating noise or unwanted signals statistics. The mode mixing issue of traditional EMD is addressed and resolved using ensemble EMD. The proposed algorithm is also tested using short-time Fourier transform (STFT) based spectrogram method. The simulation results show a noticeable performance in the field of audio source separation and speech enhancement.
Speech Enhancement Using Hilbert Spectrum and Wavelet Packet Based Soft-Thresholding
doi:10.11648/j.cssp.20150401.12
Science Journal of Circuits, Systems and Signal Processing
2015-04-29
© Science Publishing Group
Md. Ekramul Hamid
Md. Khademul Islam Molla
Md. Iqbal Aziz Khan
Takayoshi Nakai
Speech Enhancement Using Hilbert Spectrum and Wavelet Packet Based Soft-Thresholding
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1
8
8
2015-04-29
2015-04-29
10.11648/j.cssp.20150401.12
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150401.12
© Science Publishing Group
Designing a Low- Pass Fir Digital Filter by Using Hamming Window and Blackman Window Technique
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150402.11
In this paper is simulated the time- domain unit sample response of sine function and frequency- domain response of sine function. Digital filter plays an important role in today’s world of communication and computation. Without digital filter we cannot think about proper communication because noise occurs in channel. For removing noise or cancellation of noise we use various type of digital filter. In signal processing, there are mainly two types of filters exist .they are the Finite Impulse Response (FIR) filter and Infinite Impulse Response (IIR) filter. Finite Impulse Response (FIR) filter can be designed form Infinite Impulse Response (IIR) filter by various techniques. The widely used technique is the window technique. This paper low-pass FIR filter is implemented using an efficient adjustable window function based on Hamming window and Blackman window function. The output of the FIR design by Blackman window and the Blackman window are shown in this paper by simulating the code in Matlab. The Matlab program returns with a satisfactory result with proper magnitude plotting.
In this paper is simulated the time- domain unit sample response of sine function and frequency- domain response of sine function. Digital filter plays an important role in today’s world of communication and computation. Without digital filter we cannot think about proper communication because noise occurs in channel. For removing noise or cancellation of noise we use various type of digital filter. In signal processing, there are mainly two types of filters exist .they are the Finite Impulse Response (FIR) filter and Infinite Impulse Response (IIR) filter. Finite Impulse Response (FIR) filter can be designed form Infinite Impulse Response (IIR) filter by various techniques. The widely used technique is the window technique. This paper low-pass FIR filter is implemented using an efficient adjustable window function based on Hamming window and Blackman window function. The output of the FIR design by Blackman window and the Blackman window are shown in this paper by simulating the code in Matlab. The Matlab program returns with a satisfactory result with proper magnitude plotting.
Designing a Low- Pass Fir Digital Filter by Using Hamming Window and Blackman Window Technique
doi:10.11648/j.cssp.20150402.11
Science Journal of Circuits, Systems and Signal Processing
2015-06-05
© Science Publishing Group
Mohammed Mynuddin
Md. Tanjimuddin
Md. Masud Rana
Abdullah
Designing a Low- Pass Fir Digital Filter by Using Hamming Window and Blackman Window Technique
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13
13
2015-06-05
2015-06-05
10.11648/j.cssp.20150402.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150402.11
© Science Publishing Group
A Critical Review on Automatic Speaker Recognition
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150402.12
Automatic Speaker Recognition (ASR) is use to recognizing persons from their voice. Since the voice of every human is not same because their vocal tract shapes, larynx sizes and other parts of a human voice production system. Automatic Speaker recognition is a procedure to automatically recognizing a speaker or who is speaking by the individual information counted in speech signal/waves. Automatic speaker recognition technique makes it possible to use the speaker's speech to verify their identity. It have many applications for example control access to services such as voice mail, voice dialing, banking by telephone, remote access to computers, telephone shopping, information services, database access services and security control for confidential information areas.
Automatic Speaker Recognition (ASR) is use to recognizing persons from their voice. Since the voice of every human is not same because their vocal tract shapes, larynx sizes and other parts of a human voice production system. Automatic Speaker recognition is a procedure to automatically recognizing a speaker or who is speaking by the individual information counted in speech signal/waves. Automatic speaker recognition technique makes it possible to use the speaker's speech to verify their identity. It have many applications for example control access to services such as voice mail, voice dialing, banking by telephone, remote access to computers, telephone shopping, information services, database access services and security control for confidential information areas.
A Critical Review on Automatic Speaker Recognition
doi:10.11648/j.cssp.20150402.12
Science Journal of Circuits, Systems and Signal Processing
2015-07-28
© Science Publishing Group
Nilu Singh
Alka Agrawal
Raees Ahmad Khan
A Critical Review on Automatic Speaker Recognition
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2015-07-28
2015-07-28
10.11648/j.cssp.20150402.12
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150402.12
© Science Publishing Group
An Algorithm for a Sub-Nyquist Rate AM and FM Software-Defined Radio Based on the Market Paradigm
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150403.11
Software-defined radio accomplishes both modulation and demodulation processes using software. While this has a number of advantages, which includes flexibility, interoperability, sustainability, and adaptability, the requirement for sampling the signal for digital processes toward adequate recovery often involves the use of a fast but expensive analogue-to-digital converter (ADC). This, in a way translates to higher cost and requirement for bigger storage. This paper presents a method of switched signal recovery at uniform sampling rates that are less than the frequently over-estimated Nyquist rate employed. In particular, an algorithm for achieving this was implemented for an AM wave, under-sampled at varied uniform rates up-to twice the carrier rate, and then demodulated using the Market Paradigm. Furthermore,the slope detectorwas also implemented by including a differentiator after the sampling stage of the algorithm. The simulated results showed that the algorithm was able to recover the message signal at sampling rates far less than twice the carrier rate without the need for any additional hardware. Specifically, the best value of the Spurious Free Dynamic Range (SFDR) obtained for the recovered message signal was 20dB at a sampling rate of less than 20% of the Nyquist rate for the carrier signal
Software-defined radio accomplishes both modulation and demodulation processes using software. While this has a number of advantages, which includes flexibility, interoperability, sustainability, and adaptability, the requirement for sampling the signal for digital processes toward adequate recovery often involves the use of a fast but expensive analogue-to-digital converter (ADC). This, in a way translates to higher cost and requirement for bigger storage. This paper presents a method of switched signal recovery at uniform sampling rates that are less than the frequently over-estimated Nyquist rate employed. In particular, an algorithm for achieving this was implemented for an AM wave, under-sampled at varied uniform rates up-to twice the carrier rate, and then demodulated using the Market Paradigm. Furthermore,the slope detectorwas also implemented by including a differentiator after the sampling stage of the algorithm. The simulated results showed that the algorithm was able to recover the message signal at sampling rates far less than twice the carrier rate without the need for any additional hardware. Specifically, the best value of the Spurious Free Dynamic Range (SFDR) obtained for the recovered message signal was 20dB at a sampling rate of less than 20% of the Nyquist rate for the carrier signal
An Algorithm for a Sub-Nyquist Rate AM and FM Software-Defined Radio Based on the Market Paradigm
doi:10.11648/j.cssp.20150403.11
Science Journal of Circuits, Systems and Signal Processing
2015-08-14
© Science Publishing Group
Thomas KokumoYesufu
Joel Adeniyi Otolorin
Akinbode Alex Olawole
An Algorithm for a Sub-Nyquist Rate AM and FM Software-Defined Radio Based on the Market Paradigm
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2015-08-14
2015-08-14
10.11648/j.cssp.20150403.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150403.11
© Science Publishing Group
Algorithm Development of a Sampled Data Frequency Modulation Demodulator for the Implementation of Software Defined Radios
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150404.11
The study developed and evaluated the performance of an improved algorithm to demodulate sampled data frequency modulation (FM) signals in typical field programmable gate array (FPGA) - based software defined radios (SDR). An algorithm, based on the modification of a standard differentiate-divide FM demodulator was developed. The hardware resources requirement and the input noise suppression ability of the developed algorithm were investigated. The demodulator developed requires a quarter of the hardware resources needed by conventional differentiate-divide FM demodulators. The output signal to noise ratio (SNR) of the developed demodulator is lower than that of the standard differentiate divide-demodulator when the input carrier to noise ratio (CNR) is less than 45 decibels. The SNR plot of the developed demodulator is more linear, compared to that of the original differentiate-divide demodulator. This implies that the developed demodulator can be implemented using smaller sized FPGAs, thus reducing cost and the power dissipated. The small silicon area occupied by the demodulator gives room for instantiation of more demodulators and other signal processing units on the same FPGA chip
The study developed and evaluated the performance of an improved algorithm to demodulate sampled data frequency modulation (FM) signals in typical field programmable gate array (FPGA) - based software defined radios (SDR). An algorithm, based on the modification of a standard differentiate-divide FM demodulator was developed. The hardware resources requirement and the input noise suppression ability of the developed algorithm were investigated. The demodulator developed requires a quarter of the hardware resources needed by conventional differentiate-divide FM demodulators. The output signal to noise ratio (SNR) of the developed demodulator is lower than that of the standard differentiate divide-demodulator when the input carrier to noise ratio (CNR) is less than 45 decibels. The SNR plot of the developed demodulator is more linear, compared to that of the original differentiate-divide demodulator. This implies that the developed demodulator can be implemented using smaller sized FPGAs, thus reducing cost and the power dissipated. The small silicon area occupied by the demodulator gives room for instantiation of more demodulators and other signal processing units on the same FPGA chip
Algorithm Development of a Sampled Data Frequency Modulation Demodulator for the Implementation of Software Defined Radios
doi:10.11648/j.cssp.20150404.11
Science Journal of Circuits, Systems and Signal Processing
2015-08-14
© Science Publishing Group
Thomas Kokumo Yesufu
Abiodun Alani Ogunseye
Algorithm Development of a Sampled Data Frequency Modulation Demodulator for the Implementation of Software Defined Radios
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29
29
2015-08-14
2015-08-14
10.11648/j.cssp.20150404.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150404.11
© Science Publishing Group
A Survey of BPL Technology and Feasibility of Its Application in Iran (Gilan Province)
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150405.11
Recently Broadband over power lines (BPL) has received much attention in communication technology and this is due to economically of sending high data rate services by re-use of power line cables. As data transfer via power lines to final consumer is one of the growing technologies, this study discusses the modeling and optimization of data transfer via power transfer lines and feasibility and adaptation of using this technology in Gilan are investigated. Finally, a model is evaluated for power lines by selection of a cable in selected area (Gilan province) as high speed transfer media and by investigation of the effect of different loads on channel feature, simulation and transfer function between various areas of network are considered. Simulation is done by ABCD transfer matrix and channel frequency response is achieved. This model is useful in description of frequency response of lines of this network and application in design of data transfer system.
Recently Broadband over power lines (BPL) has received much attention in communication technology and this is due to economically of sending high data rate services by re-use of power line cables. As data transfer via power lines to final consumer is one of the growing technologies, this study discusses the modeling and optimization of data transfer via power transfer lines and feasibility and adaptation of using this technology in Gilan are investigated. Finally, a model is evaluated for power lines by selection of a cable in selected area (Gilan province) as high speed transfer media and by investigation of the effect of different loads on channel feature, simulation and transfer function between various areas of network are considered. Simulation is done by ABCD transfer matrix and channel frequency response is achieved. This model is useful in description of frequency response of lines of this network and application in design of data transfer system.
A Survey of BPL Technology and Feasibility of Its Application in Iran (Gilan Province)
doi:10.11648/j.cssp.20150405.11
Science Journal of Circuits, Systems and Signal Processing
2015-09-02
© Science Publishing Group
Mohammad Taghipour
Milad Safari
Hamed Bagheri
A Survey of BPL Technology and Feasibility of Its Application in Iran (Gilan Province)
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2015-09-02
2015-09-02
10.11648/j.cssp.20150405.11
http://www.sciencepublishinggroup.com/journal/paperinfo.aspx?journalid=136&doi=10.11648/j.cssp.20150405.11
© Science Publishing Group